A Proposed Fast Word Level Sequential Scheme and Parallel Architecture for Bit Plane Coding of EBCOT Used in JPEG2000

Bit Plane Coding (BPC) is an important component of the EBCOT block in JPEG2000 encoder. This paper introduced new algorithm for neighboring significance contribution and Run Length Coding (RLC). The paper also presented a fast word level sequential scheme and parallel architecture for bit plane coding. Bit plane coding adopted by EBCOT is mainly divided into three stages: significance generation, coding pass prediction and context formation, which work in parallel and pipelined. The proposed architecture simplifies control procedure and operates at a higher processing speed (up to 164MHz in Xilinx Virtex 4 FPGA).