FPGA Implementation of a Reed-Solomon CODEC for OTN G.709 Standard with Reduced Decoder Area

The Reed-Solomon error correction code is widely used in digital telecommunication systems, including satellite communications and data recording systems such as CD and DVD. This article presents an implementation for the encoder and the decoder of optical communication systems, according to the ITU-T G.709 standard. It presents an approach that multiplexes the traditional decoder blocks. The implementation promotes an expressive area reduction in an FPGA. It also presents the circuit implementation in a Virtex 5 FPGA, using software Xilinx ISE 10.1 tools.