A non-local impact ionization/lattice temperature model for VLSI double-gate ultrathin SOI NMOS devices

This paper presents an analytical drain current model for VLSI double-gate ultrathin SOI NMOS devices considering both the nonlocal impact ionization effect and the lattice temperature effect. Supported by the experimental data, the analytical model predicts that the double-gate SOI NMOS device has a more obvious nonlocal impact ionization effect and a higher lattice thermal effect as compared to the single-gate device.