Excess noise reduction in GaInP/GaAs heterojunction bipolar transistors

In this paper an annealing procedure which gives an excess noise reduction both of heavily C-doped resistive structures and GaInP/GaAs Heterojunction Bipolar Transistors (HBTs) of 5 dB is proposed. The investigation of the correlation between the noise generators indicate that the annealing leads to a decrease of noise voltage attributed to a strain reduction both in the intrinsic and in the extrinsic base related to a site switching effect of carbon atoms. The reduction of noise current with annealing is attributed to the surface improvement related passivation process by hydrogen atoms.