Characteristics and applications of a 0.6 /spl mu/m bipolar-CMOS-DMOS technology combining VLSI non-volatile memories

This paper describes the 5th generation, designed at 0.6 /spl mu/m, of the BCD process family commercially introduced ten years ago. Called BCD5, this smart power process provides very dense and high performance bipolar, CMOS and DMOS functions and is compatible with VLSI EPROM, EEPROM and Flash Non-Volatile Memories. Extremely complex systems requiring analog, digital and power functions, /spl mu/P cores and significant amount of memories (hundreds of Kbits) can be realized in one chip (Super Smart Power integration) using BCD5.