A low-power backward equalizer for DFE read-channel applications

A general-purpose backward equalizer for use in decision feedback equalization systems is described. Current-steering techniques are used to achieve high-speed low-power operation. A four-tap prototype for use in a magnetic disk read-channel chip has been implemented in a standard digital 1.2-/spl mu/m n-well CMOS process. The circuit operates at 67 MHz and dissipates 1 mW/tap from a 3.3 V power supply.