A 3.1 mW Continuous-Time ΔΣ Modulator With 5-Bit Successive Approximation Quantizer for WCDMA

In this paper, we present a multibit continuous-time delta-sigma modulator based on a 5-bit successive approximation quantizer. The use of successive approximation, instead of flash, is driven by the desire to reduce the quantizer power and area. The quantizer delay is effectively compensated to ensure system stability. The modulator is implemented in a 130 nm CMOS technology and achieves 62 dB of dynamic range over 1.92 MHz while consuming 3.1 mW from a 1.2 V supply.