Project on an electrically reprogrammable fast read-out memory using bipolar tetrode transistors

This paper presents a project on an electrically reprogrammable memory system in which the control of the avalanche degradation of the H of bipolar tetrode transistor is executed by the gate voltage. The design of a type REPROM with 1024 bits capacity having an access time better than 100 ns for a total power of 500 mW is attempted.