A CMOS Floating-Point Processing Chip for Verified Exact Vector Arithmetic

A 33 MHz CMOS floating-point coprocessor which computes the vector scalar product without rounding errors has been designed. Using a floating-point algorithm for verified numerical computation, an ultra-high accuracy for double-precision operations is achieved with a 4k-bit fixed-point accumulator. This new type of accumulation is composed of a dual-port RAM and a fast carry acceleration logic. A peak performance of 15 MFLOPs in scalar product operations has been attained by the use of parallel operations. The 45k gate chip has been fabricated with the semicustom GATE FOREST [1].