A 32ns 64Mb DRAM with Extended Second Metal Line Architecture

This paper proposes a new array architecture named extended second metal line (ESL) architecture, in which second metal line is used as not only power lines for distributed sense-amp drivers but global data-buses in the memory array. The self-recovering Vpp generator for output driver is further described to ensure the output high level in fast column access modes. By using the proposed array and circuit techniques in a 64Mb DRAM, fast RAS access time of 32ns has been achieved.