A 55nsec 4Mb CMOS EPROM

A 55 nsec 4Mbit CMOS EPROM has been developed. Fast access time has been achieved splitting bit lines and using mid-word line repeaters. A new matrix biasing scheme is used to improve the Vee operating range; The device features a typical programming time of 10 usec and an active current of 30 mA; it is produced with a 0.8 um CMOS twin-well process.