A DVB-T2 receiver realization based on a software-defined radio concept

When DVB-T (Digital Video Broadcasting - Terrestrial) was introduced in the 1990s, it was impossible to foresee the upcoming demand for HDTV devices. Thus, a revision of this broadcasting standard, namely DVB-T2, was necessary. Recently finalized, this standard is targeting to high-definition television (HDTV). To pave the way to commercialization, an appropriate implementation concept and its corresponding validation are of utmost importance. Without a doubt, the most challenging requirements introduced by the DVB-T2 specification are an FFT (Fast Fourier Transform) size of up to 32k samples, 256-QAM (Quadrature Amplitude Modulation) and LDPC (Low-Density Parity-Check) coding with a block size of 64800 bits. Within this manuscript, the authors present a software-defined radio based realization of a demonstrator platform. This platform employs a combined DSP (Digital Signal Processor) and FPGA (Field-Programmable Gate Array) solution being capable of meeting these requirements.