The Usefulness of Advanced Drain Structures as Emitters in Scaled BICMOS

Bipolar transistors can be implemented in a CMOS technology without excessive expense using the n-channel source/drain implantation simultaneously for the formation of the bipolar emitter. During MOS scaling the change of the drain structures from phosphorus to DID and LDD influences the individual bipolar device parameters. However this BICMOS concept can be extended to sub-μm CMOS without loosing performance.