A GIGABIT scalable SILO field isolation using Rapid Thermal Nitridation (RTN) of silicon

This paper presents a SILO/RTN type isolation [1] so-called SUPERSILO/RTN [2] (fig. 1) shrinkable for 0.25 μm CMOS device generation: this process can improve drastically the field oxide thinning and active area corner effects. Experimental 64 Mbit CMOS EPROM devices are fabricated for electrical characterization. The NMOS devices performances and isolation are ultimately optimized by the use of a retrograde de 0° tilt boron field implant through the poly gate material and field oxide at 350keV. Crystalline defects elimination, implant dose reduction by almost a factor of 10 as respect to the conventionnal process together with improved active devices performances are obtained. High performance 0.5μm/0.5μm EPROM cells are realized.