A 45nm CMOS 13-port 64-word 41b fully associative content-addressable register file

A13-port 64-word 41 b fully associative content-addressable register file that is part of a dual-issue superscalar ARMv7-architecture CPU is described. The register file is part of the register-renaming function within the CPU, allowing for the resolution of data hazards common to out-of-order superscalar CPUs. The register file occupies 0.062 mm
²
in a 1.1 V 45 nm CMOS technology and operates at 1.4 GHz while consuming 21 mW.