Novel BiST methods for parametric test in wireless transceivers

This paper describes RF built-in self test (BiST) techniques to test the performance of a RF CMOS integrated wireless transceiver using on-chip digital resources as both the stimuli and response analyzer. Using a defect-oriented approach, key RF blocks as well as the overall functionality and performance of the device are analyzed using a combination of block level and loopback testing. Using these methods, contributors to error vector magnitude (EVM) such as amplifier gain, phase noise, and linearity performance (IP3) can be estimated and collected to predict the functional performance of a digital radio processor (DRP) for wireless applications.