Effects of fin width on memory windows in FinFET ZRAMs

In this paper, the effects of fin width on transient coupling for nMOS and pMOS FinFET transistors was evaluated as a function of applied back gate bias during the write pulse, and the gate length dependence of impact-ionization effects was also evaluated for potential ZRAM operation on SOI substrate. It was observed that the scaling trends with decreasing fin width were unfavorable for the backgate pulse technique, but highly favorable for impact ionization. The results obtained for highly scaled FinFETs programmed via impact ionization are quite promising for potential future technology insertion.