A bias-switch-multiplexing comparator for the ADC used in SWR

This paper presents an ultra-high-speed comparator for ADC (analog to digital converter) which could be used in SWR (software radio). In this design, based on 0.35-¿m SiGe BiCMOS process, a small size MOSFET is used to take place of the current bias and the control switch in the traditional HBT comparator, thus it could make the comparator faster speed and less power dissipation. The simulation indicates that the improved comparator could even work at the speed up to 20 GHz when f
_T
of corresponding technology is 55 GHz. The input sensitivity is no more than 14 mV and the power dissipation is only 36 mW at 20 GHz sampling. The comparator can absolutely be used in an 8 bits ADC with the demands of high speed and wideband up to 40 GHz.