A gated ring oscillator based parallel-TDC system with digital resolution enhancement

A digital resolution enhancement technique for time-to-digital converters (TDC) is proposed. This involves a simultaneous multi-channel measurement of a time-interval with low-complexity TDCs of varying resolutions. The coarse outputs of each converter are then digitally post-processed to obtain a single result whose precision is much better than that of any individual converter. A prototype system with 8 channels is demonstrated in 90-nm CMOS. 45MS/s output of each channel is algorithmically combined to obtain over 2–3X improvement in the resolution in 4/6/8 channel modes. The chip occupies 0.3 mm
²
and draws up to a maximum of 4 mA from a 1.2 V supply.