Speeding up motion estimation in modern video encoders using approximate metrics and SIMD processors

In the past, efforts have been devoted to the amelioration of motion estimation algorithms to speed up motion compensated video coding. Now, efforts are increasingly being directed at exploiting the underlying architecture, in particular, single instruction, multiple data (SIMD) instruction sets. The resilience of motion estimation algorithms to various error metrics allows us to propose new high performance approximate metrics based on the sum of absolute differences (SAD). These new approximate metrics are amenable to efficient branch-free SIMD implementations which yield impressive speed-ups, up to 11:1 in some cases, while sacrificing image quality for less than 0.1 dB on average.