A New FPGA placement algorithm for heterogeneous resources

In this paper, we present a new placement algorithm targeted on a modern FPGA with heterogeneous logic and routing resources. This algorithm divides the heterogeneous resources of an FPGA into different logic layers, obtains a good initial placement by a quadratic method, and then employs low-temperature simulated annealing on each logic layer to determine the final location for all modules. Experiment result shows that the algorithm not only gains a saving of runtime by 27% compared with the classical approach of Versatile Place and Route (VPR) while having the same performance, but is also highly adaptable to modern FPGAs which have heterogeneous logic and routing resources.