Impact of stress engineering on high-k metal gate ESD diodes in 32nm SOI technology

Low current and high current ESD characteristics of the Poly-Bounded and High-k Metal Gate-bounded ESD diodes with varying stress components are studied in 32 nm SOI technology. It is observed that embedded SiGe (e-SiGe) stress on the anode degrades the ESD protection performance significantly mainly due to the introduction of defects in the active region. Compressive stress liners, tensile stress liners and stress due to Stress Memorization Technique (SMT) show only a marginal shift in the diode performance.