Reed-Solomon Codec for a Reconfigurable Baseband Processing Platform

This paper presents the VLSI design of a multi-mode Reed-Solomon codec. Our decoder design is based on the modified Euclidean (ME) algorithm and shares hardware between the ME algorithm and the computation part of the Chien search. With its ability to support a variety of RS(n, k, t) code parameters (0 les n les 255), (0 les t les 8) as well as different finite fields GF(2
^m
), (3 les m les 8), this RS codec design is suitable for use in a reconfigurable baseband processing platform. Synthesis results indicate that this codec operates at a maximum frequency of 177 MHz and has a peak data processing rate of 1416 Mbps.