Far-end maximum crosstalk for coupled lines as function of load

The move to 45 nm technology has seen a further reduction in the noise margin for CMOS devices. This has resulted in severe constraints on crosstalk between adjacent lines on the SIP (System-In-Package) substrate. The known formula in the literature for calculation of crosstalk between two coupled lines includes only the impact of the driver impedance but not the impact of the load capacitance. In this paper a formula has been developed to calculate the amplitude of coupled noise between two adjacent signal lines as a function of load capacitance.