ESD protection design for giga-Hz RF CMOS LNA with novel impedance-isolation technique

A novel ESD protection design with impedance-isolation technique is proposed and successfully verified in a 0.25-mum CMOS process with top thick metal. Its purpose is to reduce the detrimental effect of the on-chip ESD protection circuit on the power gain and noise figure of an RF LNA circuit. With the resonance of LC-tank, the impedance generated from the ESD protection devices can be isolated from the input node of RF LNA at the operation frequency, so the power gain loss and noise figure of RF LNA can be successfully codesigned with the desired ESD robustness. The proposed ESD protection circuit with novel impedance-isolation technique will be one of the most effective ESD protection solutions for RF circuits in higher frequency band (> 10 GHz).