Product integrity assessment using fatigue synthesis for avionics programs

The thermo-mechanical integrity of an electronics assembly is strongly affected by the attachment method used between functional components and the printed wiring board. The use of solder as an interconnect medium is the most common method in use today. In most applications, solder is required to serve multiple functions including electrical, thermal, and structural connection. Repetitive loads caused by thermal cycling and vibrations result in cyclical thermo-mechanical stresses that often lead to pre-mature fatigue cracking in the solder. Continued exposure to these environments leads to degradation or failure of the solder thereby reducing the hardware's useful life. This paper presents a novel method for predicting the fatigue life of an electronics assembly by analyzing every interconnect using an automated process modeling approach. Modular fatigue based routines, incorporated through a user friendly software tool known as FSAP (Fatigue Synthesis for Avionics Programs), facilitate concurrent design development and optimization relative to the hardware's thermo-mechanical fatigue response. FSAP integrates the global effects from specific usage environments with the detailed design and process features associated with the electronics assembly. An application of FSAP along with comprehensive model validation results from accelerated fatigue life testing is presented for a variety of common interconnect configurations including leaded and non-leaded surface mount components and hybrid/MCM packages.