A CMI decoder with single bit error correction capabilities

This paper presents the architecture of a new coded mark inversion (CMI) decoder with improved bit error rate (BER) performance. This new decoder initially processes the received data as NRZ unencoded data at twice the original frequency and then uses a pattern matching circuit for achieving bit-level synchronization and detecting corrupted bits. The decoding and the error correction procedures are finally performed by using a simple sequential circuit. The error correction function is based on a state transition diagram by minimizing the probabilities for state transition between valid and invalid states.