A Design of 2.6 GHz Auto-Biasing Cascode Class-E PA with Vdd/AM and Vdd /PM Compensations in EER System

An auto-biasing cascode class-E PA which can compensate the Vdd/AM and Vdd/PM distortion resulting from supply modulation has been proposed. The output voltage of auto-biasing control circuit is generated and varied linearly with PApsilas supply voltage so that the cascode transistor is degenerated into a resistance and the PApsilas nonlinear distortion can be compensated. The simulation result shows that the distortion is compensated evidently and the system co-simulation demonstrated that system EVM can be improved from -17 to -19 dB. Also, the drain efficiency of the PA can be improved 15% within small supply voltage range.