Jitter robust DRAM modeling

This paper presents jitter robust DRAM modeling. Jitter analysis of mixed mode PLL-DLL in DRAM environment has been carried out. According to the jitter type, this model can be used as pure PLL or pure DLL or a mixed PLL-DLL. It is observed that mixed mode PLL-DLL architecture can combine the advantage from both PLL and DLL to reduce jitter in DRAM which is very important to cover both consumer and commodity DRAM applications.