MPEG1 and MPEG2 system layer implementation trade-off between micro coded and FSM architecture

In the context of digital consumer applications, it has been necessary to develop a parser handling the MPEG1 and MPEG2 system layer. This application is embedded either in the front end of audio, or video decoders, or as a back end of demultiplexer serving these applications. It works at 24 MHz and is implemented in 0.5 micron technology. Micro coded (MC) and finite state machine (FSM) architecture have been evaluated in detail, in order to manage trade-offs including flexibility, performance, development time, area versus timing or area versus scheduling.