A 1.8mW Wideband 57dBΩ transimpedance amplifier in 0.13µm CMOS

In multi-hundred Gb/s parallel optical links for on-chip or chip-to-chip data transfer, system components should be very low power while occupying small chip areas. This paper presents a low power transimpedance amplifier (TIA) that is based on regulated cascode with vertically stacked inductors, and can operate up to 10 Gb/s in presence of 370 fF input capacitance. The 0.13 mum CMOS TIA consumes 1.8 mW to provide 57 dBOmega transimpedance gain, while occupying 150 mumtimes100 mum active area. The measured input referred current noise of the differential TIA is less than 30 pA/radicHz across 8 GHz.