UML Modeling and Formal Verification of Control/Data Driven Embedded Systems

In this paper, we present our approach for UML based modeling of control/data driven embedded systems. In our case application is presented as a network of hierarchic data driven and control driven tasks that communicate via abstract channels. Hardware platform is modeled as UML structure diagram. Mapping of application on hardware platform is modeled through UML constraints. From UML models, a Maude specification is generated. We use this formal specification to formally validate system functionality against some undesirable properties and to estimate system power consumption at a high level of abstraction.