Performance Comparison between capacitively driven low swing and conventional interconnects for CU and carbon nanotube wire technologies

The on-chip interconnect bottleneck with conventional Cu/low-k and delay optimized repeater scheme presents a compelling reason to explore novel interconnect circuit architectures. The capacitively driven low-swing interconnect (CDLSI) has the potential to affect a significant energy saving and latency reduction. The purpose of this work is two fold: Firstly, to develop an accurate analytical, optimized model for CDLSI wire scheme; Secondly, to quantify and compare the delay and energy expenditure for not only different interconnect circuit schemes, but also various future technologies such as Cu, carbon nanotube and optics. We find that CDLSI circuit scheme outperforms the conventional interconnects in latency and energy per bit for lower bandwidth requirement, while these advantages degrade for higher bandwidth requirements.