A physically based device model for fully depleted and nearly fully depleted SOI MOSFET

An accurate submicron MOSFET device model for Silicon-On-Insulator (SOI) technology suitable for analog as well as digital applications has been developed. In developing this model care has been taken in retaining the basic functional form of physical models while improving the model accuracy. In addition to the commonly included effects in the SOI MOSFET model, we have given careful consideration to source/drain parasitic resistance, kink effect, self-heating and model continuity. The accuracy of the model is validated with experimental data and found to be in good agreement.