A new degradation mode of scaled p/sup +/ polysilicon gate pMOSFETs induced by bias temperature (BT) instability

A new degradation mode induced by bias temperature (BT) instability is found in short channel p/sup +/ polysilicon gate (p/sup +/-gate) pMOSFETs. This instability, i.e. negative threshold voltage shift, increases significantly by reducing gate length due to the local degradation of gate oxide near the source/drain (S/D) edge, as a result of the electrochemical reaction between holes and oxide defects. This degradation is enhanced by boron penetration through the oxide from the p/sup +/-gate peculiar to p/sup +/-gate MOS structures. These results indicate that it is important to suppress BT instability of p/sup +/-gate pMOSFETs for scaling down CMOS devices.