Temperature dependent modeling of PD SOI MOSFETs subthreshold conduction

A new temperature dependent subthreshold region model for partially depleted (PD) SOI MOSFET is presented. The model uses the effective gate bias to replace the gate bias in the current expression. This effective gate bias ensures smooth transition between tile strong and weak conduction regions. The model circumvents the discontinuity inherent in the MOS3 subthreshold region model. The model is applied to different geometry (PD) NMOS and PMOS SOI devices over very wide temperature ranges (25-300/spl deg/C). The model results are closely correlated the measured results at all temperatures.