Simulating total-dose and dose-rate effects on digital microelectronics timing delays using VHDL

This paper describes a fast timing simulator based on Very High Speed Integrated Circuit (VHSIC) Hardware Description Language (VHDL) for simulating the timing of digital microelectronics in pre-irradiation, total dose, and dose-rate radiation environments. The goal of this research is the rapid and accurate timing simulation of radiation-hardened microelectronic circuits before, during, and after exposure to ionizing radiation. The results of this research effort were the development of VHDL compatible models capable of rapid and accurate simulation of the effect of radiation on the timing performance of microelectronic circuits. The effects of radiation for total dose at 1 Mrad(Si) and dose rates up to 2/spl times/10/sup 12/ rads(Si) per second were modeled for a variety of Separation by IMplantation of OXygen (SIMOX) circuits. In all cases tested, the VHDL simulations ran at least 600 times faster than SPICE while maintaining a timing accuracy to within 15 percent of SPICE values.