0.25 /spl mu/m CMOS/SIMOX gate array LSI

Silicon-on-insulator (SOI) devices have several advantages. Small parasitic capacitances make them useful for high-speed, low-power and low-voltage LSIs. SOI devices are soft-error free, latchup free, and have a high-density layout due to complete isolation. In this paper, we report a 0.25 /spl mu/m CMOS/SIMOX 300 kG gate array LSI using fully-depleted MOSFETs fabricated on a low-dose high-quality SIMOX substrate.