Advanced dielectric etching with a high density plasma tool: issues and challenges in manufacturing

Summary form only given, as follows. The requirements for 0.25 /spl mu/m etch technologies are making successful dielectric etch processing more difficult to realize than ever before. The minute dimensions of the features, coupled with films of widely varying thickness (/spl ap/7000 to 20000+/spl Aring/) result in inherently narrow process windows, wherein the balance between RIE "lag" (ARDE) and selectivity to underlayers (e.g. Si/sub 3/ N/sub 4/) that are chemically similar to the film being etched but which have the added property of nonplanarity, and thus higher sputter yield. Maintaining selectivity to impurities, charge-up and particulates require that tools and processes address cleanliness, plasma uniformity and materials to degrees unthinkable until only recently. This paper describes the development of one such tool, a low pressure, inductively coupled, high density plasma system that has addressed a number of the issues arising from these advanced application etches. Among the items and issues discussed will be the underlying principals of operation, the implementation and etch results, especially on contact, self-aligned contact (SAC) and via applications. Issues affecting "manufacturability", their causes and solutions will also be addressed along with some considerations of scaling the system to 300 mm wafer sizes.