A CMOS continuous-time NTSC-to-color-difference decoder

A continuous-time NTSC-to-color-difference decoder has been fabricated in a 2-/spl mu/m CMOS process. The 9-mm/sup 2/ decoder includes the chrominance IF filter, automatic gain control, timing recovery, 90/spl deg/ phase shift, demodulators, hue and saturation controls. The 90/spl deg/ phase-shift circuit is based on peak detection and is used for tuning the chrominance IF filter and demodulation of the R-Y signal. The total power dissipation is 45 mW on /spl plusmn/2.5-V supplies. All circuits are fully differential. This allows the timing-recovery outputs to achieve a differential phase of 0.1/spl deg/ over a horizontal-line interval. For a standard NTSC 1 V/sub p-p/ color-bar input, the R-Y and B-Y outputs exhibit maximum phase and gain errors of 1.1/spl deg/ and 1.5/spl deg/, respectively.