A Current-Efficient, Low-Dropout Regulator with Improved Load Regulation

This paper presents a novel topology for LDO regulators, improving load regulation with very low quiescent current. The core of the circuit is made by operating the pass transistor in the linear region, achieving an area reduction above 90%, reducing the gate capacitance and therefore improving loop response. The proposed structure to improve the load regulation is based on transconductance cells and current mirrors, allowing to sink the remaining energy on the compensation capacitor without affecting battery lifetime. This design was developed in AMS 0.35 mum technology and occupies only 0.025 mm
²
with a quiescent current of 10 muA. The proposed LDO can deliver 50 mA @ 3.3 V with 200 mV dropout, a load regulation of 591 nV/mA and is able to recover within 3 mus for any load transient. Extensive post-layout simulations and monte carlo analysis were performed in order to validate these results.