Circuit-design oriented modelling of the recovery BTI component and post-BD gate currents

In ultra-scaled technologies, the absence of suitable models for the MOSFET aging mechanisms leads to a lack of understanding of their real impact on the circuit performance and reliability. In this work, models for two of the main reliability issues at device level, bias temperature instability (BTI) and time dependent dielectric breakdown (TDDB), are presented. The models cover important properties of both phenomena, such as the threshold voltage recovery for BTI or the transistor area and voltage dependences for TDDB. Both models, which can be easily implemented in circuit simulators, have been used to study the BTI and TDDB impact in invertors and current mirrors performance, respectively.