Reliable fast detection anti-collision technique for RFID system implemented on chip

The paper presented a proposed Reliable Fast Detection Anti-collision Technique (RFDACT) for Radio Frequency Identification (RFID) system. Our proposed RFDACT is implemented on-chip using Application Specific Integrated Circuit (ASIC) technology. The RFDACT consists of two main subsystems; PreFDACT and PostFDACT. The PreFDACT detects any error in the incoming messages. Then, the identification bit (ID) of the error free packet will be fed to the next subsystem. The PostFDACT will identify the tag by using the deterministic fast detection anti-collision technique. The proposed system is designed using Verilog HDL. The system is simulated using Modelsim and synthesized using Xilinx Synthesis Technology. The system has been successfully implemented in hardware using Field Programmable Grid Array (FPGA) VirtexII. The output waveforms from the FPGA are tested on the Tektronix Logic Analyzer for real time verification. Finally the RFDACT system is implemented on chip using 0.18 mum Library, Synopsys Compiler and tools. The hardware verification result shows the proposed system enables to identify the tags at the operating frequency of 180 MHz without error. The systempsilas chip is consumed 7.578mW powers, occupied 6,041 gates and 0.0375 mm
²
area.