New approaches to interconnect macromodeling with explicit delay extraction

IC design automation relies on macromodels for interconnect analysis. For simulation speed, low-order macromodels are in general preferred. Besides rational macromodels, explicit delay components e
^−τs
are of special interest in interconnect timing. This paper investigates new approaches to modeling interconnects in the form of multiplying a rational function by a delay component. Fitting-based techniques are used both in the time-domain and in the frequency-domain for the purpose of hybrid modeling using sampled data. A technique for passivity test is also introduced. Examples are given to demonstrate the effectiveness of the proposed methodology.