The APx accelerator

The architectural and implementational features that work together in the APx accelerator to achieve high sustained system performance for a significant set of compute-intensive functions are presented. The features include VLSI integration, memory bandwidth, concurrency of operations, interprocessor communications, processor selection mechanisms, and I/O bandwidth. The APx is an expandable system and provides from 64 to 256 16-bit processors which provide peak instruction rates from 800 to 3200 MIPs. The individual processors in the APx accelerator are 16-bit RISC processors which are quite powerful and versatile. In addition, pairs of 16-bit processors can be configured to operate in 32-bit mode under software control. IEEE format single precision floating-point operations are supported in 32-bit mode with peak ratings from 40 to 160 MFLOPS.<
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