A Center-Offset Polycrystalline-Silicon Thin-Film Transistor With ${\rm n}^{+}$ Amorphous-Silicon Contacts

We have studied a bottom-gate polycrystalline-silicon thin-film transistor (poly-Si TFT) with amorphous-silicon (a-Si) ${\rm n}^{+}$ contacts and center-offset gated structure, where intrinsic poly-Si is used in the center-offset region. The fabrication process is compatible with the conventional a-Si TFT with addition of thermal annealing for crystallization of a-Si. The bottom-gate poly-Si TFT with a 5-$\mu\hbox{m}$ offset length exhibited a field-effect mobility of 18.3 $\hbox{cm}^{2}/\hbox{V} \cdot \hbox{s}$ and minimum OFF-state current of $\hbox{2.79} \times \hbox{10}^{-12}\ \hbox{A}/\mu\hbox{m}$ at $V_{\rm ds} = \hbox{5}\ \hbox{V}$. The leakage currents are two orders of magnitude lower than those of a nonoffset TFT with mobility drop from 23.8 to 18.3 $\hbox{cm}^{2}/ \hbox{V} \cdot \hbox{s}$.