Temperature-dependent hole and electron mobility models for CMOS circuit simulation

Semi-empirical hole and electron mobility models with temperature dependence have been proposed for circuit simulation as well as for process characterization. These models are based on the universal dependence of low field mobility on the effective transverse field and cover a wide range of oxide thickness as well as of temperature. The accuracy of our models is justified by comparing them with experimental work reported in the literature as well as that obtained in our laboratory. They are accurate and physical enough to be suited for the circuit simulation of modern VLSI CMOS circuits with gate oxide thickness less then 400 /spl Aring/ in the temperature range of 250-400 K.<
>