A Q-band phased-array front-end with integrated Wilkinson couplers for linear power combining in SiGe BiCMOS

A 4-element phased-array front-end receiver based on 4-bit RF phase shifters is designed for 36–46 GHz satellite communications. The phased-array uses a corporate-feed approach with integrated Wilkinson combiners for linear coherent power combining. The measured loss in the Wilkinson coupler is 0.5–0.6 dB at 30–50 GHz. The phased-array shows 10.4 dB of average power gain, ≤1.2 dB of RMS gain error, ≤8.7° of RMS phase error and an IIP3 of −13.5 dBm per channel for all 4-bit phase states at 38.5 GHz. The chip consumes 118 mA from a 5 V supply voltage. The overall chip size is 1.4×1.7 mm
²
and includes all the digital control circuits (address decoders, registers, etc.) for the array.