Techniques for measuring the common mode current and voltage of ASIC devices

With the increasing numbers of transistors in todaypsilas die as well as incorporating mixed technology (i.e. analog, RF, digital, and power), large scale devices with their large switching currents create internal voltage drops due to the package design (i.e. wire bond or flip-chip) that can be a source of common mode noise. The normal lumped components, the printed circuit boards, the harnessing, and the packaging are well known contributors and there are various measurement techniques to identify these noise sources. However, what is lacking are some measurement techniques applicable specifically for determining if a large scale integrated circuit type devices could be a noise source. This paper will look at a couple of proposed techniques specifically for the chip level.