Design considerations of the RF front-end for high dynamic range digital radar receivers

In optimizing high dynamic range digital radar receivers, some non-straight forward trade-offs in the design considerations of the RF front-end should be taken into account. The designer should pay more attention in particular to the noise figure degradation caused by the Analog to Digital Converter (ADC) and the linearity margin of every non-linear component in the receiver chain. An S-band IF sampling digital radar receiver design utilizing an 14-bit ADC is presented, theoretically analyzed and simulated by using Agilent Advanced Design System (ADS) software. Finally, simulation results are presented to demonstrate the validity of the theoretical analysis.